1. Field of the Invention
The present invention relates to a semiconductor device, a substrate for an electro-optical device, the electro-optical device, an electronic equipment, and a projector.
2. Description of Related Art
The SOI (Silicon On Insulator) technology in which a semiconductor device is formed on a silicon insulator film on top of an insulating substrate has been extensively studied because the SOI technologies offer high-speed, low-power consumption features and the high degree of integration in devices.
One of the SOI technologies is a manufacturing technique of an SOI substrate in which monocrystalline silicon substrates are laminated. In this method, called a lamination technique, after a monocrystalline silicon substrate and a support substrate are laminated using hydrogen bond force, the strength of the lamination is reinforced by a thermal treatment, and the monocrystalline silicon substrate is subjected to grinding and abrasion or a thin-film monocrystalline silicon layer is formed on the support substrate using etching technique. Since this technique directly constructs a thin-film monocrystalline silicon substrate, a resulting silicon thin film has an excellent crystallinity, leading to the manufacture of a high-performance device.
Known techniques developed from the lamination method include one technique (U.S. Pat. No. 5,374,564) in which hydrogen ions are implanted into a monocrystalline silicon substrate to be laminated onto a support substrate, and the thin-film silicon layer is separated from the hydrogen implanted region of the monocrystalline silicon substrate through a heat treatment; and another technique (Japanese Unexamined Patent Publication No. 4-346418) in which a monocrystalline silicon layer is epitaxially grown on a silicon substrate having a porous surface, the resulting substrate is laminated on a support substrate, the silicon substrate is then removed, and the porous silicon layer is then etched away so that the epitaxial thin layer of monocrystalline silicon is thus formed on the support substrate.
Like ordinary bulk semiconductor substrates, the SOI substrate manufactured in accordance with the lamination method finds widespread use in a variety of devices, but one of the differences from the conventional bulk substrates is that various materials may be used as a support substrate. As a support substrate, not only ordinary silicon substrate, but also transparent quartz substrate or glass substrate may be used. By forming a monocrystalline silicon thin film on a transparent substrate, a device that needs light transmissivity, such as a transmissive liquid-crystal display device, is manufactured, and a high-performance transistor device using a monocrystalline silicon having an excellent crystallinity is thus provided.
In the field-effect transistor on an ordinary silicon substrate, or so-called MOSFET (Metal Oxide Semiconductor Field Effect Transistor), by fixing a well potential, a channel potential of the MOSFET formed in the same well is fixed. In the SOI substrate, however, the substrate surface on which the channel region of the MOSFET is formed is an insulator, and the channel regions are electrically completely isolated from transistor to transistor, and the potential of each channel needs to be fixed on a per transistor basis. If the channel potential remains unfixed, the channel region is subject to carrier (charge) accumulation because of the effect of a floating substrate. Particularly when the channel region is constructed of a monocrystalline silicon, the charge mobility is high in the monocrystalline silicon, and a charge accumulates in the channel region because of a potential difference between the source and drain when the MOSFET is turned off. When the MOSFET is turned on, an excess current tends to flow. In the thin-film structure of the MOSFET, a diversity of problems arise, for example, an excess carrier (charge) lowers the breakdown voltage of the drain of the transistor element or causes a kink in the current-voltage characteristics of the transistor element. The fixing of the channel potential is thus required.
Known methods for fixing the channel potential using an excess charge include one technique called a source tie (IEEE Trans. Eelectron Device, Vol. 35, p. 1391, 1988) in which a channel and a source are equalized in potential by forming a conductive impurity zone in the source region identical to a channel in semiconductor type, and another technique called H(T) type gate (IEEE Trans. Electron Device, Vol. ED-36, p. 938, 1989, for example) in which a contact is formed on a channel region extending from the end of a gate.
Depending on the potential applied, the source and the drain alternate in a MOSFET which is arranged for each pixel in a liquid-crystal panel and which supplies each pixel with a voltage in response to a signal, and a symmetrical property is thus required of the MOSFET. To allow the MOSFET produced on the SOI substrate to drive the liquid crystal, the source tie structure that has an asymmetrical MOSFET structure cannot be used. To employ a fairly symmetrical H(T) type gate, a potential line for fixing the channel potential is required in addition to scanning lines and data lines. The transmissive liquid-crystal display device in which a lightness is important suffers a drop in the aperture ratio.
It is an object of the present invention to provide a semiconductor device which is made highly reliable and excellent in quality by fixing a channel potential of a MOSFET to a light shielding layer that shields the MOSFET from a light ray in a semiconductor device of the MOSFET formed on an insulator such as an SOI substrate, and to provide highly reliable and excellent quality substrate for electro-optical device, electro-optical device employing the substrate, electronic equipment employing the electro-optical device, and projector.
The semiconductor device of the present invention, having a semiconductor layer formed on an insulator, includes a transistor in which at least a channel region is formed in the semiconductor layer, and a light shielding layer for shielding the transistor from a light ray, wherein the light shielding layer is electrically connected to the channel region of the transistor. In accordance with the present invention, the light shielding layer shields the transistor from a light ray, preventing the transistor from erratically operating due to a leakage current arising from light and thereby stabilizing the potential of the channel. Since the voltage is applied to the channel of the transistor, the effect of a floating substrate is thus controlled by draining an excess carrier (charge) accumulated in the channel to the light shielding layer. The withstanding voltage of the transistor is thus improved, and kinks in the current-voltage characteristics of the transistor are controlled.
In the present invention, preferably, the transistor is an N-channel-type transistor, and the light shielding layer electrically connected to the channel region of the N-channel-type transistor is supplied with a low power source potential. In the N-channel-type transistor, the charge is accumulated in its channel region. By supplying the low power source potential, the excess carrier (charge) is efficiently drained and the potential of the channel is thus stabilized.
In the present invention, preferably, the transistor is an N-channel-type transistor, and the light shielding layer electrically connected to the channel region of the N-channel-type transistor is supplied with a potential equal to or lower than the lowest potential of the potential applied to one of the source and the drain of the N-channel-type transistor. The carrier (charge) is efficiently drained by supplying the low power source potential equal to or lower than the lowest potential of the potential applied to one of the source and the drain of the N-channel-type transistor.
In the present invention, preferably, the transistor is a P-channel-type transistor, and the light shielding layer electrically connected to the channel region of the P-channel-type transistor is supplied with a high power source potential. In the P-channel-type transistor, the charge is accumulated in its channel region. By applying the high power source potential, the excess carrier (charge) is efficiently drained and the potential of the channel is thus stabilized.
In the present invention, preferably, the transistor is a P-channel-type transistor, and the light shielding layer electrically connected to the channel region of the P-channel-type transistor is supplied with a potential equal to or higher than the highest potential of the potential applied to one of the source and the drain of the P-channel-type transistor. The carrier (charge) is efficiently drained by applying the high power source potential equal to or higher than the highest potential of the potential applied to one of the source and the drain of the P-channel-type transistor.
In the present invention, preferably, the semiconductor layer in the channel region of the transistor extends and forms a contact region of the same conductive type, and the contact region is electrically connected to the light shielding layer. Rather than arranging a contact hole for charge draining immediately on top of or beneath the channel region, the semiconductor layer of the channel region is extended to connect to the light shielding layer. The film thickness of the channel remains unchanged and the switching operation of the transistor is not affected. Furthermore, since the contact region is constructed of the same conductive type as that of the channel, applying the channel with the voltage is easy. Preferably, the contact region is higher in impurity doping density than the channel region. With this arrangement, the resistance value of the contact region is lowered, and applying the channel with the voltage is thus facilitated.
In the present invention, preferably, the light shielding layer overlaps the transistor. By shielding the transistor from above from a light ray, a transistor leakage current arising from light is prevented.
In the present invention, the semiconductor device of the present invention, having a semiconductor layer formed on an insulator, includes a P-channel-type transistor and an N-channel-type transistor, each transistor having at least a channel region formed in the semiconductor layer, a first light shielding layer for shielding the P-channel-type transistor from a light ray, and a second light shielding layer for shielding the N-channel-type transistor from a light ray, wherein the first light shielding layer and the second light shielding layer are separately arranged, and wherein the first shielding layer is electrically connected to the channel region of the P-channel-type transistor and the second shielding layer is electrically connected to the channel region of the N-channel-type transistor. In accordance with the present invention, the light shielding layer shields the transistor from a light ray, preventing the transistor from erratically operating due to a leakage current arising from light, and thereby stabilizing the potential of the channel in each of the complementary transistors. Since the potential is applied to the channel of the transistor, the effect of a floating substrate is thus controlled by draining an excess carrier (charge) accumulated in the channel to the light shielding layer. The withstanding voltage of each of the complementary transistors is thus improved, and kinks in the current-voltage characteristics of the transistor are thus controlled. Since the light shielding layer for the P-channel and the light shield layer for the N-channel are separately arranged, the channels of the complementary transistors may be applied with different potentials.
In the present invention, preferably, the first light shielding layer is supplied with a high power source potential and the second light shielding layer is supplied with a low power source potential. The channel of the P-channel transistor is supplied with the high power source potential through the first light shielding layer, and the excess carrier (charge) is thus efficiently drained. The channel of the N-channel transistor is applied with the low power source potential through the second light shielding layer, and the excess carrier (charge) is thus efficiently drained.
In the present invention, preferably, the semiconductor layers in the channel regions of the P-channel-type transistor and the N-channel-type transistor extend and form respective contact regions of the same respective conductive types, and the contact regions are electrically connected to the respective light shielding layers. Rather than arranging a contact hole for charge draining immediately on top of or beneath the channel region, the semiconductor layer of the channel region is extended to connect to the light shielding layer. The film thickness of the channel remains unchanged and the switching operation of the transistor is not affected. Furthermore, since the contact region is constructed of the same conductive type as that of the channel, supplying the channel with the potential is easy.
In the present invention, preferably, the P-channel-type transistor and the N-channel-type transistor form a driving circuit for an electro-optical device. The use of the semiconductor device of the present invention in the driving circuit allows the high-speed operation of the driving circuit to be stabilized. Heat generated in the high-speed operation may be dissipated through the light shielding layer.
To resolve the above-referenced problems, in the substrate for an electro-optical device of the present invention in which a transistor is arranged for each pixel area of a matrix of a plurality of pixel areas formed on the substrate, a semiconductor layer which becomes a channel region for the transistor is formed on the substrate, and the semiconductor layer which becomes the channel region shields the transistor from a light ray and is electrically connected to a light shielding layer applied with a predetermined potential. In accordance with the present invention, the light shielding layer shields the transistor from a light ray, preventing the transistor from erratically operating due to a leakage current arising from light, and thereby stabilizing the potential of the channel. Since a video signal having a particularly large amplitude voltage is applied between the source and the drain of the transistor of a pixel, an excess carrier (charge) is likely to be accumulated in the channel. The excess carrier is canceled by the potential applied through the light shielding layer. The transistor withstanding voltage is heightened, and the switching operation of the transistor is stabilized. With the active area of the semiconductor layer connected to the light shielding layer, heat generated in the transistor may be dissipated through the light shielding layer. Particularly when the semiconductor layer is a monocrystalline silicon layer, the charge mobility is high, which likely generates heat, and a heat dissipation step is thus required.
In the present invention, preferably, the transistor is an N-channel-type transistor and the light shielding layer is applied with a potential equal to or lower than the potential of a video signal supplied to the transistor. In the N-channel-type transistor, the charge is accumulated in its channel region in response to the video signal applied to the source and drain. By applying the low power source voltage equal to or lower than the video signal, the excess carrier (charge) is efficiently drained and the potential of the channel is thus stabilized.
In the present invention, preferably, the transistor is a P-channel-type transistor and the light shielding layer is applied with a potential equal to or higher than the potential of a video signal supplied to the transistor. In the P-channel-type transistor, the charge is accumulated in its channel region in response to the video signal applied to the source and drain. By applying the high power source potential equal to or higher than the video signal, the excess carrier (charge) is efficiently drained and the potential of the channel is thus stabilized.
In the present invention, preferably, the transistor is an N-channel-type transistor and the light shielding layer is applied with a deselection potential of a scanning signal that controls the N-channel-type transistor for a conductive state and a non-conductive state. The deselection potential is typically set to be a potential lower than the potential of the video signal to turn the N-channel-type transistor off, and the use of the deselection potential eliminates the need for an extra power source voltage.
In the present invention, preferably, the transistor is a P-channel-type transistor and the light shielding layer is applied with a deselection potential of a scanning signal that controls the P-channel-type transistor for a conductive state and a non-conductive state. The deselection potential is typically set to be a potential higher than the potential of the video signal to turn the P-channel-type transistor off, and the use of the deselection potential eliminates the need for an extra power source voltage.
In the present invention, preferably, the semiconductor layer in the channel region of the transistor extends and forms a contact region of the same conductive type, and the contact region is electrically connected to the light shielding layer. Rather than arranging a contact hole for charge draining immediately on top of or beneath the channel region, the semiconductor layer of the channel region is extended to connect to the light shielding layer. The film thickness of the channel remains unchanged and the switching operation of the transistor is not affected. Furthermore, since the contact region is constructed of the same conductive type as that of the channel, applying the channel with the potential is easy. Preferably, the contact region is higher in impurity doping density than the channel region. With this arrangement, the resistance value of the contact region is lowered, and applying the channel with the potential is thus facilitated.
In the present invention, preferably, the light shielding layer overlaps in a plane, a scanning line with which a scanning signal for controlling the transistor for a conductive state and a non-conductive state is applied. With the light shielding layer formed on top of the scanning line, the area other than the light shielding layer is made light transmissive, and a high aperture ratio device is thus provided.
In the present invention, preferably, a further light shielding layer extends in a plane over the substrate side of the semiconductor layer, to become the channel region of the transistor. Since the transistor is sandwiched between the light shielding layers from above and from below, the transistor is shielded from incident light rays from above and from below the substrate.
In the present invention, preferably, a peripheral circuit is arranged on the substrate surrounding the pixel area, and the semiconductor layer to become the channel region of the transistor forming the peripheral circuit is electrically connected to the light shielding layer that shields the transistor from a light ray. By incorporating the same step not only in the pixel area but also in the peripheral circuit, the overall reliability of the electro-optical device is enhanced.
In the present invention, preferably, the substrate for an electro-optical device includes the peripheral circuit including a P-channel-type transistor and an N-channel-type transistor, a first light shielding layer for shielding the P-channel-type transistor from a light ray, and a second light shielding layer for shielding the N-channel-type transistor from a light ray, wherein the first light shielding layer and the second light shielding layer are separately arranged, and wherein the first shielding layer is electrically connected to the channel region of the P-channel-type transistor and the second light shielding layer is electrically connected to the channel region of the N-channel-type transistor. The same step is incorporated even when the peripheral circuit is composed of complementary transistors, and the overall reliability of the electro-optical device is enhanced.
In the present invention, preferably, the light shielding layer of the pixel area and the light shielding layer of the peripheral circuit are formed of the same layer. Preferably, the light shielding layer of the pixel area and an interconnection layer of the peripheral circuit are formed of the same layer. With this arrangement, no extra interconnection layer is required in and out of the pixel area.
In the present invention, preferably, the transistor of the pixel area is an N-channel-type transistor, and the light shielding layer of the pixel area and the light shielding layer of the N-channel-type transistor in the peripheral circuit are applied with ground potential. If the number of N-channel transistors is predominant in the electro-optical device, the channels of the N-channel-type transistors are preferably connected to ground potential to reliably operate the predominant number of N-channel-type transistors.
In the present invention, preferably, the transistor of the pixel area is a P-channel-type transistor, and the light shielding layer of the pixel area and the light shielding layer of the P-channel-type transistor in the peripheral circuit are supplied with ground potential. If the number of P-channel transistors is predominant in the electro-optical device, the channels of the P-channel-type transistors are preferably connected to ground potential to reliably operate the predominant number of P-channel-type transistors.
In the present invention, the substrate is formed of an insulating material, the substrate is formed of a quartz substrate, or the substrate is formed of a glass substrate. The present invention presents a technique that is suitable for use in the SOI substrate that forms a semiconductor layer on an insulator.
The electro-optical device of the present invention includes a substrate for an electro-optical device and an opposing substrate, wherein the substrate and the opposing substrate are separated by a sealed-in electro-optical material. The electro-optical device employing a high-performance transistor, such as an active matrix type liquid-crystal panel, is thus provided. The electro-optical device is incorporated in any of a transmissive type and a reflective type, depending on a material selected for a pixel electrode.
Since the electronic equipment of the present invention employs the above-referenced electro-optical device as a display device, a highly reliable display device is thus presented.
The projection display apparatus of the present invention includes a light source, an electro-optical device for modulating a light beam from the light source, and projection optical device for projecting the light beam modulated by the electro-optical device. The electro-optical device of the present invention is suitable for use as a light valve for a projection display apparatus in which a powerful light source illuminates the electro-optical device.